With technical advance, the feature size of IC and the volume of a single IC chip have been greatly reduced. Therefore, a circuit board can accommodate more electronic elements, and the fabrication cost of electronic products is lowered. Refer to FIGS. 1A-1D sectional views schematically showing the fabrication process of a vertical transistor. Firstly, etch a substrate 1 having an etch protection layer 2 on the surface thereof to form a plurality of trenches 3 spaced from each other. Next, fill an insulating material into the trenches 3 to form a plurality of insulators 4. Because of reduction of the feature size, the spacing d1 between two adjacent insulators 4 becomes more and more narrow. Refer to FIG. 1B. Next, remove the etch protection layer 2. As the spacing d1 has been reduced, the contact window 5 becomes smaller than before. Thus, the succeeding process becomes harder. Refer to FIG. 1C. Next, etch the insulators 4 to expand the contact windows 5. Refer to FIG. 1D. Next, form electric conductors 6 in the contact windows 5. Via the abovementioned technology, the contact area of the electric conductors 6 and the substrate 1 would not be too small to affect electric conduction. The insulators 4 are normally etched by a wet etching process. The wet etching process is an isotropic etching that etches toward all directions uniformly. The etching rate and etching time of the wet etching process is hard to control. Therefore, the wet etching process is likely to cause uneven thickness of the insulators 4 or even completely remove the insulators 4. In such a case, the adjacent electric conductors 6 are hard to effectively insulate, and the short circuit of the electric conductors 6 may take place.